See it to Place it: Evolving Macro Placements with Vision-Language Models

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• VeoPlace outperforms the best prior learning-based approach on 9 out of 10 open-source chip placement benchmarks.result 90%
• VeoPlace achieves peak wirelength reductions exceeding 32% compared to prior learning-based methods.result 90%
• VeoPlace improves the performance of the analytical placer DREAMPlace on all 8 evaluated benchmarks, with gains up to 4.3%.result 90%
• VeoPlace uses a Vision-Language Model (VLM) to guide a low-level placer by constraining it to promising subregions of the chip canvas, without requiring any fine-tuning of the VLM.method 85%
• The VLM proposals in VeoPlace are iteratively refined through an evolutionary search strategy to optimize placement quality.method 85%
• VeoPlace incorporates VLM guidance into the analytical placer DREAMPlace by adding an anchor penalty term to the optimization objective.technical 80%
• Reliance on VLMs without fine-tuning may limit the broader applicability of VeoPlace across diverse chip architectures.limitation 75%
• VeoPlace represents a novel direction in chip floorplanning by leveraging VLMs for high-level spatial reasoning, a capability that mimics human designer intuition.method 70%

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